Press Release

Fremont, California, October 17, 2007   Genesys Testware adds automated batch-mode diagnosis and characterization of embedded memories

Fremont, California, May 15, 2007   Genesys Testware adds grpahical user interface to embedded test tool

Fremont and Santa Clara, California, October 16, 2006   Genesys, Magma unveil automated Design-For-Test solution integrating ArraytestMaker and BlastCreate; Simplifies design flow for memory BIST insertion

Fremont, California, July 5, 2006   Genesys Testware adds top-down insertion of test and repair circuits for embedded memory

Fremont, California, May 22, 2006   Genesys Testware joins ARM Connected Community

Fremont, California, June 3, 2005   Genesys Testware adds efficient automated insertion of embedded test and repair circuits for memory

San Jose, California, April 26, 2005   Dolphin Technology and Genesys Testware develop design and test flow for increasing yield and quality of nanometer memories using RAMpiler+TM and ArraytestMakerTM

Santa Clara, California, September 14, 2004   Genesys Testware adds support for Cadence Encounter RTL Compiler to ChiptestMaker

San Diego, California, June 7, 2004   Genesys Testware introduces Design For Manufacturability solution for system IC

Fremont, California, October 9, 2003   Genesys Testware develops design and test flow for increasing IC yield using Artisan Flex-Repair memories with ArraytestMaker repair

Anahiem, California, June 1, 2003   Genesys Testware introduces hierarchical test for logic and wiring in system IC

Fremont, California, August 5, 2002   Genesys Testware BIST supports Artisan memory-soft repair technology which lets users avoid laser programmable fuse repair

June 18,2001   Dolphin Technology And Genesys Testware AnnounceThe First Memory Compiler To Offer Dynamic Soft Repair Capability

June 18,2001   Genesys Testware Announces The First Built-In-Self-Test Solution For Content Addressable Memories (CAMs)

June 5,2000  Genesys Testware Introduces First Full Chip Behavioural Test Synthesis tool

October 3,2000   Genesys Testware Introduces Built-In Diagnosis and Repair Solution for embedded memories with repair circuitry .

June 21, 1999  Genesys Testware adds VHDL support to Test Core family of system on chip test products.

October 19, 1998   Genesys Testware introduces unique core test pattern re-use solution for system-on-chip

June 15, 1998   Genesys Testware introduces Core library for Built-In Self-Test, Diagnosis and Repair (BISTDR) of embedded Dynamic Memories (DRAM)

November 27, 1997   Genesys Testware introduces industry's most flexible synthesizable core library  for testing deep sub-micron systems on silicon.

June 9, 1997   Genesys Testware introduces industry's first synthesizable test core  library for board test, IC debug, and board bringup.

October 22, 1996  Genesys Testware introduces industry's first synthesizable memory built-in self-test (BIST) core library to shorten design-for-test cycle.