Press Release

For more information contact:

            Bejoy Oomman                                               

            Genesys Testware, Inc.                        

            Tel: 510-661-0791 x208                                 

            Fax: 510-498-8734                                         

            Email: bejoygo@genesystest.com                 

 

FOR IMMEDIATE RELEASE

 

GENESYS TESTWARE DEVELOPS DESIGN AND TEST FLOW FOR INCREASING IC YIELD USING ARTISAN FLEX-REPAIRTM MEMORIES WITH ARRAYTESTMAKERTM REPAIR

 

 

FREMONT, California, October 9, 2003—Genesys Testware, Inc., a leading supplier of embedded test, diagnosis and repair solutions announced today that it has developed a design and test flow for increasing IC yield using Artisan Components’ Flex-Repair memories with ArraytestMaker repair. This will help IC designers in reducing manufacturing cost.

 

ArraytestMaker (formerly known as MBISTmaker) from Genensys Testware was the first commercial tool that supports repair of embedded memories. ArraytestMaker enables IC designers to generate and insert register transfer level (RTL) test, diagnosis and repair circuits around embedded memories. Flex-Repair memory compilers from Artisan can be used to efficiently build single-port memories with redundancy and fuse arrays.

 

“The design and test flow for increasing IC yield using Artisan Flex-Repair memories with ArraytestMaker repair will simplify our yield enhancement efforts for future projects”, said Chakki Kavoori, Director of engineering at Teradiant Networks, a San Jose-based developer of high-performance networking semiconductors.

 

 “This application note can help mutual customers improve chip yield”, said Herb Gebhart, director of technical marketing at Artisan. “We are pleased to see this design and test flow clearly documented and released to the design community.”

 

“We are pleased to offer a proven design and test flow for IC yield enhancement to the large number of IC designers using Artisan’ Flex-Repair memory compilers” said Bejoy Oomman, president of Genesys Testware. “IC design groups without specialized skills and prior experience with memory yield enhancement can confidently adopt this flow.”

 

A detailed application note that describes this design and test flow is available now for free download from Genesys Testware’s website (News->Application Notes selection at http://www.genesystest.com).

 

About Genesys Testware

Genesys Testware, Inc. provides a comprehensive suite of embedded test solutions that covers memory test, logic test and boundary scan. Its products are all silicon-proven in various customer designs. Genesys Testware’s corporate headquarters are located at 76 Whitney Place, Fremont, CA 94539. For more information, please visit the company’s web site at http://www.genesystest.com

 

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ArraytestMaker is a trademark of Genesys Testware, Inc. Artisan Components is a registered trademark and Flex-Repair is a trademark of Artisan Components, Inc. All other trademarks or registered trademarks are the property of their respective owners.